In the case that a chip size package (CSP) as a semiconductor package is mounted on a printed wiring board and the package main body is connected with the printed wiring board only through solder balls, if a stress in the vertical direction is applied to the ends of the chip size package, then a solder connection opposed to part to which the stress is applied is broken. To avoid this breaking, conventionally used is a method that dummy members as a spacer are disposed at the ends of the package, thereby keeping the spacing between the package main body and the printed wiring board constant, thus protecting the solder connection parts of the ball grid array.
FIGS. 1A and 1B are a front view and top view, respectively, showing the shape of chip size package after mounting the solder balls and dummy member by the conventional method for making semiconductor package. Here, shown is a chip size package that is provided with one semiconductor chip (not shown) diced from a semiconductor wafer. There are provided protective dummy members 2 (protective parts) that are of round resinous or metallic material with a predetermined height at the corners on the surface of a package main-body board 1 that has a size nearly equal to that of the semiconductor chip. On a region 4 except these parts, there are mounted multiple solder balls 3, which compose a ball grid array (BGA), at predetermined intervals. The protective dummy member 2 is a protrusion provided to protect the ball grid array during fabrication of the package. The diameter of the protective dummy members 2 is set to be larger than that of the solder balls 3, and the solder balls 3 are disposed avoiding the regions of the protective dummy members 2. Therefore, array area 4 as the mounting region of the solder balls 3 is approximately hexagonal.
FIG. 2 is a flow chart showing the conventional method for making a semiconductor package. First, the package main-body board 1 is prepared (step 201). Then, a semiconductor chip (not shown) diced from a semiconductor wafer is mounted on the package main-body board 1 (step 202). Then, after wire-bonding lands on the semiconductor chip to a wiring pattern (or lands) on the package main-body board 1 (step 203), the surface subject to the bonding is sealed with resin mold (step 204). Further, as shown in FIG. 1A, the solder balls 3 are mounted on corresponding lands on the surface of the package main-body board 1 that is not subject to the resin molding. Then, the protective dummy members 2 are mounted using a mold tool.
As described above, in the conventional method, the molding and sealing, the mounting of solder balls, and the mounting of protective dummy members are conducted individually to each semiconductor chip.
Thus, in the conventional method for making a semiconductor package, there is a problem that the process is difficult to simplify since the molding and sealing, the mounting of solder balls, and the mounting of protective dummy members are conducted individually to each package main-body board. Therefore, it is difficult to reduce the manufacturing cost by the mass production.
Also, the protective dummy members are difficult to position at the ends of package with a high degree of accuracy. They have to be positioned a given distance (.alpha. in FIG. 1B), as a margin, apart from the ends of package. Therefore, when a stress in the vertical direction is applied to the ends of package after fabrication, it will exhibit a lowered tolerance.
In recent years, the lump transfer method that a large number of semiconductor chips can be molded in the lump has attracted attention. However, in a semiconductor device that has the structure of chip size package or ball grid array, it is difficult to attach the dummy members efficiently. Therefore, it becomes an obstacle to the practical use of the lump transfer method.